Automatic address progression supervising device
US3949205A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 20, 1974 |
| Grant date | Apr 6, 1976 |
| Priority date | — |
| Expiry date | Nov 20, 1994 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/024
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A supervising device is described for detecting errors in an automatic progression of the addresses of words which must be sequentially read out from a store under the control of a command logic forming the starting address from an operation code and thereafter incrementing the address by combining a portion of each read-out word with other data. Said device comprises a code comparator the output of which is activated when a code of a restricted number of bits derived from the operation code and a code of the same number of bits derived from a read out word disagree except when this second code presents a particular configuration of bits as, for instance an all identical binary value bit configuration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.