Code and generating means for avionics communciations synthesizer
US3949296A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 23, 1975 |
| Grant date | Apr 6, 1976 |
| Priority date | — |
| Expiry date | Jan 23, 1995 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/0662
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
For use in a channel synthesizer utilizing a pulse swallowing phase locked loop, an eight bit code represents the megahertz component of the selected channel. An eight stage shift register is preloaded with the coded version of the selected megahertz component, and exclusive OR logic responsive selectively to the first, third, fifth, and eighth stages generates data for the first stage during the next shift. NAND logic responsive to the various stages detects presence of certain code combinations which are representative of terminal count states. Each terminal count pulse is utilized for comparison with the frequency reference in the phase locked loop, and also in a feedback arrangement to reset the registers to their preloaded states.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.