Receiver digital control system
US3953801A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 3, 1974 |
| Grant date | Apr 27, 1976 |
| Priority date | — |
| Expiry date | Jun 3, 1994 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03J7/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A broadcast receiver has a reversible binary counter having its output coupled to a digital-to-analog converter which translates the counter's binary coded output signal to a control voltage and applies it to a voltage controllable circuit means. A local source of clock pulses is selectively coupled to the counter by a pair of operator actuated switches to preferentially alter the counter output signal. The binary coded counter output signals are coupled to a non-volatile memory by read/write means for storage during periods of receiver deactivation and reimposed on the counter during subsequent activation of the receiver. Receiver activation and deactivation transitions are detected by voltage sensing means which are coupled to the read/write means and are responsive to changes in the receiver operating potential. Preset means comprising a non-volatile, non-erasable memory and selector switches permit resetting the counter to a predetermined binary data configuration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.