Semiconductor devices having surface state control and method of manufacture
US3956025A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 1974 |
| Grant date | May 11, 1976 |
| Priority date | — |
| Expiry date | Mar 25, 1994 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/917
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure having a surface insulating layer formed as a grid with charges implanted in the insulating material to prevent inversion and, hence, channeling between adjacent semiconductor regions, preferably for use in nonblooming vidicon. The method of manufacturing such a structure uses ion implantation to create immobile positive charges in a grid pattern in an insulating layer in regions spaced from the interface between the insulating layer and the semiconductor body. The insulating layer is of sufficient thickness that substantially all of the charge sites in the insulating layer are separated from the outer surface of the insulator by a sufficient distance to effectively prevent a negative electric field from reaching into the silicon.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.