Semiconductor random access memory
US3959781A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 4, 1974 |
| Grant date | May 25, 1976 |
| Priority date | — |
| Expiry date | Nov 4, 1994 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4087
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A random access memory system employing dynamic storage wherein each cell comprises a single active element. The memory employs MOS technology and is disposed on a silicon substrate. A plurality of sense amplifiers are disposed in a column substantially bisecting each row of memory cells in the memory array. A single input/output line communicates with all the cells. Two dummy cells are employed on each row line on opposite sides of the sense amplifiers. The value of the signal provided by the dummy cell is approximately mid-way between a "0" signal and a "1" signal provided by the storage cells. A plurality of timing signals are generated within the memory; accurate timing is obtained by utilizing the output of one timing generator to trigger or initiate the generation of a signal in another generator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.