Disturbance pulse detector circuit for radio receiver blanking
US3961268A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 30, 1975 |
| Grant date | Jun 1, 1976 |
| Priority date | — |
| Expiry date | Jun 30, 1995 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G3/345
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Two disturbance recognition circuits are supplied in parallel with the output of the receiver demodulator, one of them having a threshold characteristic with a sensitivity maximum only slightly above the frequency band of the received signal and a steep sensitivity frequency characteristic between that maximum and the upper edge of the signal band, while the other recognition circuit has its sensitivity well above the main sensitivity range of the first-mentioned recognition circuit. An AND-circuit is provided at the ouputs of the recognition circuits so that a blanking pulse will be produced only when both recognition circuits respond. The output pulse of the recognition circuit with the higher frequency sensitivity is broadened so that it will persist in the AND-circuit long enough to allow for the slower response time of the other recognition circuit. Blanking is disabled by a parallel switch when the rate of operation of the AND-circuit reaches a rate at which audible effects would be produced anyway.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.