Digital display apparatus having jitter correction
US3962567A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 13, 1975 |
| Grant date | Jun 8, 1976 |
| Priority date | — |
| Expiry date | Jan 13, 1995 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K21/18
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A digital speedometer, frequency or event counter with digital display. The speedometer conventionally receives speed pulses representative of the speed of the vehicle. Due to the lack of synchronization between speed pulses and clock pulses the last display digit exhibits undesirable jitter. This may also be caused by backlash in the drive train or the like. This jitter is minimized by the provision of a precounter between the counter and the gate transfer to a storage register. This will permit transfer of the number generated in the counter only if the precounter is in the zero state, thus minimizing the jitter due to random occurrences of the last pulse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.