Time-division multiplex switching system
US3963870A · kind A · utility
19Cited by
7References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 26, 1974 |
| Grant date | Jun 15, 1976 |
| Priority date | — |
| Expiry date | Feb 26, 1994 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q11/04
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Two-way links communication capability between time-division multiplexed subsystems is provided via dual time division address and data busses correlated by a recirculating memory having sections respectively associated with the address busses. Addresses on the address busses are recognized by the individual subsystems and further decoded to gate data to and from the busses data according to time slots assigned to terminal devices in the subsystems. The dual bus arrangement provides a full-duplex link in the sense that there is simultaneous communication via the two data busses, one each way.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.