Encoding scheme for failure detection in random access memories
US3963908A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 24, 1975 |
| Grant date | Jun 15, 1976 |
| Priority date | — |
| Expiry date | Feb 24, 1995 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1036
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A virtual encoding scheme for use in random access memories is disclosed. Data errors, incorrect memory word access errors, and errors resulting from multiple memory word access are all detectable through use of the encoding scheme. The novel approach includes the generation of two distinct check code fields which are stored along with the data. A first check code field is generated as a function of the data and is capable of reflecting all unidirectional data failures. A second check code field is generated as a function of the address of the memory word containing the data and is capable of reflecting incorrect memory word access. The two check fields can be stored either in the same physical memory location as the data or in a supplementary memory at an address numerically identical to that at which the data is kept. During readout, the two check fields are regenerated and compared to those previously stored.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.