Amplifying integrated circuit in the MOS technology
US3967208A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 1975 |
| Grant date | Jun 29, 1976 |
| Priority date | — |
| Expiry date | Jan 16, 1995 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/83
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A negative-feedback band-pass amplifier constructed in accordance with the MOS technology comprises an input stage of the summing amplifier type constituted by two MOS transistors having sources connected to each other and to ground and drains connected to each other. The gate of one transistor constitutes the amplifier input and the gate of the other transistor is connected to the amplifier output through the negative feedback resistance. An amplifying chain whose input is coupled with the common drain connection of the input stage and whose output constitutes the amplifier output comprises n identical stages in series. Each stage is of the inverting amplifier type constituted by an MOS transistor mounted with a common source connected to ground and an MOS transistor mounted as a load resistance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.