Pulse suppressing circuit arrangements and equipment incorporating the same
US3970944A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 27, 1975 |
| Grant date | Jul 20, 1976 |
| Priority date | — |
| Expiry date | Feb 27, 1995 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/20
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A pulse suppression circuit arrangement, suitable for use in a data transmission system, for suppressing, in dependence on the length thereof, noise disturbance or other undesired signal pulses of lengths outside a range of lengths in which useful signal pulses lie wherein a train of output signal pulses, freed of superimposed errors caused by said undesired signal pulses, is obtained by at least one process of coupling incoming signal pulses with generated pulses produced when said incoming signal pulses occur, each such coupling process consisting in coupling incoming signals or signals derived therefrom with the generated pulse output from triggerable pulse generator means triggered by signal pulse edges of one polarity and the time constant of which is less than the useful signal pulse length and greater than undesired signal pulse length and again effecting such coupling under the control of incoming signal edges of the other polarity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.