Memory for use in a computer system in which memories have diverse retrieval characteristics
US3974479A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 5, 1974 |
| Grant date | Aug 10, 1976 |
| Priority date | — |
| Expiry date | Apr 5, 1994 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4239
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory unit for use with a central processor unit in a data processing system. To retrieve data from the memory unit, the central processor unit energizes an appropriate one of several memory retrieval control signal conductors and memory address signal conductors to initiate a memory cycle during which the memory unit transmits an address acknowledgement signal and data signals back to the central processor unit. The memory unit has a characteristic retrieval interval during which the memory cycle is performed to retrieve data. Each memory retrieval control signal corresponds to a different category of characteristic retrieval interval. When the memory unit transmits the data signals, it transmits a data control signal which is delayed with respect to the address acknowledgement signal by a time interval that is directly related to the characteristic retrieval interval for the memory unit. If a memory unit has a certain characteristic retrieval interval, there also is included a circuit for transmitting a data warning signal a fixed time before the data control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.