Dither threshold generators
US3975584A · kind A · utility
4Cited by
2References
24Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 22, 1975 |
| Grant date | Aug 17, 1976 |
| Priority date | — |
| Expiry date | Sep 22, 1995 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N5/70
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In a dithered display system, the two highest-order dither threshold bits are each generated exclusively in response to the least-significant row and column address counter bits and the third- and fourth-highest-order dither threshold bits are each generated exclusively in response to the second-least-significant row and column address counter bits, and so forth.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.