Patent · US Expired

Paralleling of inverters for low harmonics

US3979662A · kind A · utility

30Cited by
4References
18Claims
0Family size

Assignee

Inventor

Key dates

Filing dateMay 5, 1975
Grant dateSep 7, 1976
Priority date
Expiry dateMay 5, 1995

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH02M7/49
  • WIPO fieldElectrical machinery, apparatus, energy
  • WIPO sectorElectrical engineering

Abstract

Two switching-type three-phase inverters are connected to supply electrical power to a common load in such a way that the load voltage has lower harmonic content than that of either inverter alone. Harmonic content is reduced by interconnecting the inverters by means of transformers to cancel some of the harmonic voltages, but a main component of output power of one of the inverters is used directly without being transformed, so that the total required KVA of the transformers is relatively small. Each phase of load voltage is produced from four or six component phasors, by adding two or three voltages from one of the inverters and two or three voltages from the other.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.