Process for electrically interconnecting chips with substrates employing gold alloy bumps and magnetic materials therein
US3986255A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 29, 1974 |
| Grant date | Oct 19, 1976 |
| Priority date | — |
| Expiry date | Nov 29, 1994 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49149
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Gold alloy bumps are built up upon conductive pads formed upon electronic chips. The bumps are thereafter aligned with conductive portions of a generally larger substrate to which the chips are to be electrically connected. The bumps are produced by either vacuum evaporating or plating metallic layers over the conductive chip pad areas wherein certain layers within the bumps are formed of magnetic metals such as cobalt or nickel cobalt alloys. Metallic layers of gold and alloying metal are evaporated or plated over the deposited magnetic metals to complete the formation of the bumps. The chips are thereafter subjected to a sufficient amount of heat to cause the bumps to flow, thereby to form a reliable electrical connection between the chips and the substrate. The magnetic materials formed within the bumps result in ease of transporting and manipulating the chips for further processing by means of magnetic plates or other pickup devices. The flowing of the bumps renders the electrical interconnections between the chips and substrate self-aligning since the molten alloy will be attracted to and bond to the adjacent conductive substrate pads rather than the non-metallic portions imme…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.