Charge transfer binary counter
US3989956A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 18, 1975 |
| Grant date | Nov 2, 1976 |
| Priority date | — |
| Expiry date | Apr 18, 1995 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D44/45
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A two-phase charge transfer binary counter capable of counting the number of signal pulses in a particular time interval is described. The counter includes a charge storage medium in which is formed at least one charge storage "Q-cell" adapted to quantize each signal pulse into a charge packet. In tandem with the Q-cells are a plurality of one-bit shift registers each of which, except the last, comprises first and second charge storage cells connected in series. Adjacent cells of the same shift register are separated from one another by a threshold potential barrier of magnitude V.sub.T which permits only partial charge transfer thereacross. In contrast, adjacent cells of consecutive shift registers are separated from one another by a smaller transfer potential barrier of magnitude V.sub.B which permits virtually complete charge transfer thereacross. A feedback path is established between adjacent cells of the same shift register in order to clear residual charge from the first cell in response to charge transferred over its threshold barrier. At the end of the time interval, however, charge transfer ceases and the charge packets residing in the first cell of each shift register ar…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.