Semiconductor integrated circuits and method of manufacturing the same
US3990102A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 26, 1975 |
| Grant date | Nov 2, 1976 |
| Priority date | — |
| Expiry date | Jun 26, 1995 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/122
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor integrated circuits comprising a dielectric isolation semiconductor chip having a plurality of monocrystalline semiconductor regions electrically separated by a polycrystalline semiconductor and dielectric insulation films, and circuit elements formed in the monocrystalline regions, wherein the polycrystalline substrate includes a high resistivity layer and a low resistivity layer, at least the high resistivity layer is adjacent to the monocrystalline region and the low resistivity region is coupled to a contact provided on a surface of the chip, whereby an electrostatic coupling between the circuit elements is shielded by the low resistivity layer to prevent cross-talks due to the electrostatic coupling. A method of manufacturing the same is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.