Digital phase shifter
US3997772A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 5, 1975 |
| Grant date | Dec 14, 1976 |
| Priority date | — |
| Expiry date | Sep 5, 1995 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0037
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In many digital processing systems it is necessary to delay an applied signal by a time interval which is not an integer multiple of the system sampling period. Disclosed herein is a digital phase shifter which utilizes a particular digital filtering scheme for supplying virtually any predetermined delay. Although conceptually related to the digital concepts of phase shift by interpolation and decimation in which the sampling rate is first increased and then restored to the original sampling rate after effecting the desired phase shift, the disclosed phase shifter operates entirely at the system sampling rate. This is accomplished by establishing a specific predetermined subset of digital filter coefficients and combining the coefficients with the input signal samples in a multiplier and accumulator circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.