Process for transmitting signals between two chips with high-speed complementary MOS circuits

US4002928A · kind A · utility

Assignee

• Siemens Aktiengesellschaft · DE

Inventors

• Karl Goser
• Michael Pomper · Schliersee, DE

Key dates

• Filing date: Sep 17, 1974
• Grant date: Jan 11, 1977
• Expiry date: Sep 17, 1994

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03K5/023
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

Two semiconductor chips having complementary MOS circuits are interconnected by means of an output stage provided on the first chip and an input stage provided on the second chip. The connection is a high-speed connection despite the relatively high internal impedance of the MOS transistors. The output stage incorporates MOS transistors for transforming the signal level to a relatively low level, and the input stage incorporates MOS transistors interconnected as a pulsed trigger or amplifier for restoring the low signal to a relatively high level for connection to other MOS circuits.