Non-destructive testing systems having automatic balance and sample and hold operational modes
US4006407A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 1975 |
| Grant date | Feb 1, 1977 |
| Priority date | — |
| Expiry date | Mar 10, 1995 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/00
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Automatic balancing circuits are provided for non-destructive testing systems such as eddy current systems in which an unbalance of a probe circuit including a test coil produces undesired deviations from a null indication. Error signal components are generated from a probe circuit output signal, stored in storage means and then applied in a balancing direction to cancel the effect of the unbalance of the probe circuit. Preferably, the error signal components are generated by a pair of quadrature phase detectors and the storage means comprises either a capacitor or the combination of digital storage and digital-analog converter means. The balancing is performed either automatically, with a delay in the storage operation, or by operation of a switch means between a sample or null condition in which the error signals are stored and a hold condition in which the stored error signals are applied. In one embodiment, the stored error signals are used to modulate AC signal components in quadrature phase relation which are applied in a balancing direction. In another, the stored error signals are developed from phase detector output signals and then combined therewith. In both embodiments,…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.