Fault detector circuit with two-fault memory
US4017775A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 28, 1975 |
| Grant date | Apr 12, 1977 |
| Priority date | — |
| Expiry date | Oct 28, 1995 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02P7/29
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A fault detector circuit in a silicon controlled rectifier (SCR) control for series-connected direct-current motors in which current to the motor flows in pulses through a main SCR as the main SCR is repeatedly turned on and off. If during operation the main SCR shorts, the field winding is disconnected from the armature and maintained disconnected. If during operation the main SCR is not defective but fails to commutate, the field winding is disconnected from the armature and then reconnected thereto. If the main SCR again fails to commutate, the field winding is again disconnected from the armature and is maintained disconnected therefrom.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.