Data recovery system resistant to frequency deviations
US4017803A · kind A · utility
17Cited by
1References
25Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 29, 1976 |
| Grant date | Apr 12, 1977 |
| Priority date | — |
| Expiry date | Jan 29, 1996 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/4904
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The data stream input to the recovery logic is taken from a point at which its transitions are timecoincident with those of the data stream input to the phase comparator of the phase locked oscillator loop used to control the generation of the recovery windows. No delay is provided between the data stream take-off point and its input to the recovery logic. The PLO and the window generating circuits cooperate to maintain data and clock representative transitions in the data stream applied to the recovery logic centered in the respective windows.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.