Method and means for passivation and isolation in semiconductor devices
US4017887A · kind A · utility
26Cited by
6References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 20, 1974 |
| Grant date | Apr 12, 1977 |
| Priority date | — |
| Expiry date | Dec 20, 1994 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/919
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The use of ion implantation to produce low concentrations of chromium, oxygen or iron in a gallium arsenide junction type semiconductor, utilizing the accompanying low resistivity to provide an improved device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.