Synchro rate generator
US4019145A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 24, 1976 |
| Grant date | Apr 19, 1977 |
| Priority date | — |
| Expiry date | Jun 24, 1996 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01P3/44
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Rate of change of the angle .theta. conveyed by a three-wire synchro signal is developed as an inherently normalized signal (d.theta./dt) by dividing N sin .theta. (d.theta./dt) signals by N sin .theta. signals and N cos .theta. (d.theta./dt) signals by N cos .theta. signals over selected ones of contiguous segments of a full 360.degree. range of .theta. where the divisor signals do not go through zero. The N sin .theta. and N cos .theta. signals are normalized outputs of dividers which divide synchro carrier reference demodulated sin .theta. and cos .theta. signals by a synchro carrier reference level signal. N sin .theta. and N cos .theta. signals are differentiated to derive the N sin (d.theta./dt) and N cos .theta. (d.theta./dt) signals. Logic circuitry switches appropriately signed ones of the signals as divisor and dividend inputs to an output divider whose output is (d.theta./dt) and is independent of synchro carrier level, synchro transformation ratios, phase shift between the synchro X-Y-Z voltages and the synchro carrier reference, and synchro carrier reference waveform distortion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.