Digital settable frequency generator with phase-locking loop

US4020425A · kind A · utility

Assignee

• Wandel u. Goltermann KG

Inventors

• Gunther Hoffmann · Eningen unter Achalm, DE
• Peter Harzer · Eningen unter Achalm, DE

Key dates

• Grant date: Apr 26, 1977

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03L7/23
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

A digitally settable frequency generator comprises a master oscillator whose operating frequency f.sub.Q is variable between a normal value f.sub.Q " and a slightly lower value f.sub.Q ' = (1-p)f.sub.Q " with the aid of a normally disconnected tuning capacitor. The master oscillator works into a frequency divider of fixed step-down ratio m:1 (or 2m:1) to produce a reference frequency f.sub.B. A slave oscillator, generating an output frequency f.sub.A = gf.sub.B, is controlled by a phase-locking loop including a phase comparator to which the reference frequency f.sub.B is fed along with a like frequency obtained from output frequency f.sub.A with the aid of another divider having a digitally variable integral step-down ratio g:1. A fractional value i, which may range from 0 to 100%, is set with the aid of a numerical interpolation selector to determine the number n<m of cycles of operating frequency f.sub.Q within a cycle (or half-cycle) of reference frequency f.sub.B during which that operating frequency is changed to its lower value f.sub.Q '. With a division factor of 2m, alternate half-cycles of reference frequency f.sub.B can be used for stabilizing the frequency f.sub.Q with t…