Process for simultaneously fabricating epitaxial resistors, base resistors, and vertical transistor bases
US4025364A · kind A · utility
13Cited by
5References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 11, 1975 |
| Grant date | May 24, 1977 |
| Priority date | — |
| Expiry date | Aug 11, 1995 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/151
Abstract
A process for simultaneously fabricating epitaxial resistors, base resistors, and vertical transistor bases in a semiconductor substrate utilizes the stopping power of different layers of materials to determine the location of impurity concentrations induced by ion implantation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.