Logic level conversion system
US4032800A · kind A · utility
13Cited by
2References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 7, 1975 |
| Grant date | Jun 28, 1977 |
| Priority date | — |
| Expiry date | Apr 7, 1995 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018557
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit arrangement which permits interfacing logic systems operating on different logic levels and thus requiring different supply voltages in which the supply voltage for the logic system having the smaller signal excursion is obtained by means of a pair of zener diodes connected in series across the potential and reference potential of the logic system having a larger signal excursion to develop a potential and reference potential for the system having smaller signal excursions lying between the respective potential and reference potential levels of the system having larger excursions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.