Digital correlator
US4032885A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 1, 1976 |
| Grant date | Jun 28, 1977 |
| Priority date | — |
| Expiry date | Mar 1, 1996 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/19
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital correlator which will detect a digital pattern in the presence of noise. In an n bit pseudo-noise (PN) sequence, comparison is made of the input word with m desired PN coded word patterns; a flag is raised when a pattern is detected and identified. In one embodiment all possible (six) PN code words are programmed in a ROM (Read Only Memory). The input word is compared with all six code words in a parallel sequential search mode. In another embodiment, comparison is made of a 31 bit input word with a programmed PN code word in a single parallel comparison.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.