Pattern-recognition systems having selectively alterable reject/substitution characteristics
US4032887A · kind A · utility
14Cited by
4References
8Claims
0Family size
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Inventor
Key dates
| Filing date | Nov 29, 1974 |
| Grant date | Jun 28, 1977 |
| Priority date | — |
| Expiry date | Nov 29, 1994 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06V10/98
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Two independent recognition logics produce separate identifications of an input pattern. In a selectable mode for minimizing reject errors, any non-reject identification is gated out. In a mode for minimizing substitution errors, both identifications must be the same. Differing, non-reject identifications always cause a reject code to be gated out.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.