Method of preparing portions of a semiconductor wafer surface for further processing
US4035226A · kind A · utility
6Cited by
8References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 14, 1975 |
| Grant date | Jul 12, 1977 |
| Priority date | — |
| Expiry date | Apr 14, 1995 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/942
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for producing a pattern on a semiconductor wafer during the fabrication of semiconductor devices, including integrated circuits is disclosed. A master is pressed into a layer of moldable material which is on the wafer surface to define a pattern of at least one relatively thin region and relatively thick regions therein with a high degree of definition. Thereafter the whole layer is treated, for example, to remove, by etching for example, a relatively thin region to expose a portion of the wafer surface, the relatively thick regions remaining on the wafer surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.