Error correction code and apparatus for the correction of differentially encoded quadrature phase shift keyed data (DQPSK)
US4035767A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 1976 |
| Grant date | Jul 12, 1977 |
| Priority date | — |
| Expiry date | Mar 1, 1996 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/0059
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
This specification describes a convolutional code and apparatus for the correction of errors in differentially encoded quadrature phase shift keyed data (DQPSK). In each sequence of forty bits 24 are information bits and the remainder are parity bits. Two parity bits are generated for each three information bit set in the sequence in accordance with the following equations: EQU P.sub.8.sup.a = i.sub.8.sup.a .sym.i.sub.8.sup.b .sym.i.sub.6.sup.b .sym.i.sub.1.sup.b .sym.i.sub.3.sup.c .sym.i.sub.2.sup.c EQU P.sub.8.sup.b = i.sub.8.sup.a .sym.i.sub.6.sup.a .sym.i.sub.3.sup.a .sym.i.sub.5.sup.b .sym.i.sub.8.sup.c .sym.i.sub.4.sup.c where i.sub.8.sup.a, i.sub.8.sup.b and i.sub.8.sup.c are the three information bits in the set associated with the parity bits P.sub.8.sup.a and P.sub.8.sup.b while the other information bits are from the seven sets of the sequence preceding the set associated with the parity bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.