Semi conductor memory cell utilizing sensing of variations in PN junction current conrolled by stored data
US4037243A · kind A · utility
21Cited by
7References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 23, 1976 |
| Grant date | Jul 19, 1977 |
| Priority date | — |
| Expiry date | Aug 23, 1996 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/204
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Charge is stored on the gate of a gate controlled diode in a memory element to provide a junction breakdown memory cell. A quantity of charge representative of a logical 1 or a logical 0 may be dynamically stored in one embodiment. In another embodiment a composite silicon nitride/silicon dioxide dielectric is utilized to provide non-volatile storage of a logic state. Selection and sensing circuitry are coupled to an array of junction breakdown memory elements. Sensing circuitry detects the difference in reverse current of the gate controlled diode corresponding to a stored logical 1 and a stored logical 0, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.