Method for making transistor structures
US4038107A · kind A · utility
26Cited by
7References
6Claims
0Family size
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Key dates
| Filing date | Dec 3, 1975 |
| Grant date | Jul 26, 1977 |
| Priority date | — |
| Expiry date | Dec 3, 1995 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/111
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An extremely short channel Field Effect Transistor (FET) is made by making a first ion implant through a polysilicon mask aperture, converting the surface of the polysilicon into SiO.sub.2 to constrict the aperture size and then making a second ion implant of the opposite type impurity through the constricted aperture. The SiO.sub.2 growth effectively moves the edge of the mask by a small controlled distance. This permits a small controlled spacing between the two ion implants, which is used for defining an extremely short FET channel. Alternatively, a bipolar transistor with a narrow base zone can be made by analogous processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.