Method of fabricating an array of semiconductor devices
US4040169A · kind A · utility
5Cited by
2References
6Claims
0Family size
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Inventor
Key dates
| Filing date | Dec 29, 1975 |
| Grant date | Aug 9, 1977 |
| Priority date | — |
| Expiry date | Dec 29, 1995 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/53261
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a semiconductor diode array, utilizing an alignment tool to precisely position a plurality of diodes so that they can be bonded into a precision array. The alignment tool and a method for fabricating the tool are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.