Data processing system featuring subroutine linkage operations using hardware controlled stacks
US4041462A · kind A · utility
35Cited by
5References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 30, 1976 |
| Grant date | Aug 9, 1977 |
| Priority date | — |
| Expiry date | Apr 30, 1996 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4486
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system is described wherein, during linkage to a subroutine, by a single machine instruction, a complete status save and the assignment of a dynamic work area are effected. By another single machine instruction the process is reversed. The elements of the complete machine status and the dynamic work area are retained in a hardware controlled stack, thus permitting nesting of the subroutine calls.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.