Outer and asynchronous storage extension system
US4042911A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 1976 |
| Grant date | Aug 16, 1977 |
| Priority date | — |
| Expiry date | Apr 30, 1996 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0623
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Extending the size of the main memory of a data processing system having a synchronous inner storage unit by attaching a relocation translator having special connection interfaces and translated addressing for attaching a synchronous outer storage unit and an asynchronous storage unit which may be remotely located from the processor. A differnt form of storage cycle is generated by the translator for interfacing each of the three storage units being accessed. The translator performs address translation which expands the number of bits in the physical address to support the extended main memory. The extended address uses a concatenation of a program-derived address and a machine-derived address key. The maximum extendable size of the memory can substantially exceed the maximum addressing capability of any program, which is determined by the relocatable addressability obtained through any stack of segmentation registers. The maximum extendable size of the main memory is determined by the number of bit positions in the physical block address field in a segmentation register (for addressing a physical block in any of the storage units) concatenated with the number of bit positions need…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.