Feature extraction system for extracting a predetermined feature from a signal
US4044311A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 13, 1976 |
| Grant date | Aug 23, 1977 |
| Priority date | — |
| Expiry date | Jan 13, 1996 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/153
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A feature extraction system comprises first and second memory circuits and a control circuit for controlling a storing period of time when signals are stored in the first memory circuit. The first and the second memory circuits comprise capacitor memory circuits, the time constant of the second memory circuit being larger than that of the first memory circuit. First and second comparators are coupled to the first and the second memory circuit, respectively. Signals supplied to the first memory circuit are compared with the contents thereof by the first comparator, so that the maximum signal thereof within a predetermined period of time controlled by the control circuit is stored in the first memory circuit. After the predetermined period of time, the contents of the first memory circuit are supplied to the second memory circuit and then the first memory circuit operates to store the maximum signal of the signals supplied to the first memory circuit within a next predetermined period of time. Signals from the first memory circuit are compared with the contents thereof by the second comparator in order to extract the maximum signal of the signals from the first memory circuit, which …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.