Non-volatile random access memory system
US4044343A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 29, 1976 |
| Grant date | Aug 23, 1977 |
| Priority date | — |
| Expiry date | Apr 29, 1996 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C14/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile random access memory system includes a memory array circuit having a plurality of unit non-volatile memory cells arranged in a matrix array. Each unit memory cell includes a flip-flop circuit and two MNOS transistors into which a data in the flip-flop is written and from which the data written therein is transferred to the flip-flop. The system also includes means for selecting a desired one of the unit memory cells and an input-output circuit adapted to supply a data to the selected unit cell and deliver the data read out of the selected unit cell. The system further includes a source voltage variation detector circuit adapted to deliver, when the source voltage for the memory array circuit is rendered ON, a control signal including a readout signal for reading the data in the MNOS transistors into the flip-flop or a source voltage variation detector circuit adapted to generate a control signal including a write signal for writing a data in the flip-flop circuit into the MNOS transistors when the source voltage is rendered OFF and a readout signal for reading the data in the MNOS transistors into the flip-flop circuit when the source voltage is rendered ON, and mean…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.