Method for addressing X-Y matrix display cells
US4044345A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 21, 1975 |
| Grant date | Aug 23, 1977 |
| Priority date | — |
| Expiry date | Oct 21, 1995 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G3/3622
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A matrix addressing method for a group of X-Y matrix display cells having an X.sub.i - Y.sub.j two-dimensional matrix electrode structure (where i equals 1,2,3, . . . , M, and j equals 1,2,3, . . . , N) during an N time frame period comprising the steps of: applying an X.sub.i - electrode voltage e.sub.Xi having a binary value of one or zero to the 1,2,3, . . . , M electrodes in such a manner that only a single binary one is applied during an N time frame period, applying a Y.sub.j -electrode voltage e.sub.Yj having a binary value of one or zero sequentially to the 1,2,3, . . . N Y.sub.j electrodes in such a manner that a binary one is only applied to the first electrode during the first time frame, a binary one is only applied to the second electrode during the second time frame, a binary one is only applied to the third electrode during the third time frame, . . . , and a binary one is only applied to the Nth electrode during the Nth time frame; and addressing matrix display cells P.sub.ij in response to the timing at which the electrode voltages e.sub.Xi and e.sub.Yj assume individual binary states.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.