Multilevel metallization process
US4045302A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 8, 1976 |
| Grant date | Aug 30, 1977 |
| Priority date | — |
| Expiry date | Jul 8, 1996 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02178
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of making a multilevel conductor pattern for a semiconductor device. An aluminum layer on the substrate surface provides a situs for first level conductors. Successive soft and hard anodization steps are advantageously used to provide excellent intralevel isolation and interlevel electrical connection in desired areas. First level conductor sites are masked and the two anodized films are selectively removed in the desired nonconductive areas. The remaining first level aluminum is completely anodized. An insulating layer is then deposited and vias are formed therethrough to connect a subsequently deposited second level metallization layer with the conductor sites.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.