Peripheral processing system
US4047158A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 13, 1974 |
| Grant date | Sep 6, 1977 |
| Priority date | — |
| Expiry date | Dec 13, 1994 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G5/222
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A medium capacity peripheral processing system provides sophisticated interactive human communication without the extremely large, expensive memory systems that are normally associated with a main frame computer. The system includes a data bus interconnecting a 16 bit parallel processor, a random access memory having up to 64K words of memory storage, up to eight magnetic tape files, up to eight magnetic disk files, a key station multiplexer, and selector channels providing additional communication capabilities. The selector channels permit optional communication with a main frame computer system, a remote data entry system which may be a simple CRT key station or another peripheral processing system, a high speed optical character reader (OCR), a line printer, a computer output microfilm (COM) unit, or other data processing systems or subsystems. The key station multiplexer provides communication of serial address, data and control signals for up to 64 addressable, CRT key station terminals. The CRT key station terminals are dependent upon individual processor generated commands received over a single, bidirectional coaxial cable for each automatic repeat of a data key, each audib…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.