Error control for digital multipoint circuits
US4048441A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 6, 1976 |
| Grant date | Sep 13, 1977 |
| Priority date | — |
| Expiry date | Jul 6, 1996 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/00
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A multipoint synchronous data network is formed by junction units which provide signal paths that interconnect incoming branch lines to a common outgoing branch. The junction units arranged to combine the branches so that data words on one branch are propagated up the common branch, subject to the condition that only one branch can send to the common branch at a time. Each data word includes a designation whether the word carries message information or control information (such as an idle branch condition). Control words are blocked by the junction unit so that message words from a sending branch are not garbled by control words from idle branches. The junction unit passes each message word from a sending branch to the common branch if the junction unit had not priorly passed any message word to the common branch (presumably because all branches were idle) or if a message word priorly passed was from the sending branch whereby error conditions on idle branches simulating message words are not passed to garble the data from the sending branch. This control is maintained by the sending branch for a plurality of word intervals after it has terminated sending data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.