Error detection and correction system
US4054863A · kind A · utility
15Cited by
7References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 29, 1976 |
| Grant date | Oct 18, 1977 |
| Priority date | — |
| Expiry date | Nov 29, 1996 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B14/042
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An error reducing arrangement is provided for a signal receiver wherein a sequence of received signals is divided into groups and each group is partitioned into subgroups. A signal representative of the deviations among the signals of each group and a signal representative of the deviations among the signals of each subgroup of said group are generated. Responsive to a subgroup deviation signal exceeding its group deviation signal, the subgroup signals are altered to reduce the subgroup deviations. In this manner errors are reduced without affecting error free signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.