Partial response, quadrature amplitude modulation system
US4055727A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 20, 1976 |
| Grant date | Oct 25, 1977 |
| Priority date | — |
| Expiry date | Aug 20, 1996 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/3836
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A communication system combines partial response and quadrature amplitude modulation systems. Two parallel input signals supplied for transmission are processed by a differential logic circuit which produces two parallel output signals, in turn supplied to respective pre-coding circuits and subsequently to corresponding partial response converter circuits. Corresponding modulators receive the thus processed two parallel signals for amplitude modulation of respective quadrature-related carrier signals and for combining same for QAM transmission. The differential logic circuit examines the parallel input signals and, for a code combination thereof wherein the code combination would not be influenced by the 90.degree. phase ambiguity of the regenerated carrier during demodulation in the receiver, the parallel input signals received thereby are applied directly to the pre-coding circuits; conversely, where the code combination of the parallel input signal code combination would be influenced by the 90.degree. phase ambiguity of the regenerated carrier during the aforesaid demodulation, the two parallel input signals are processed in accordance with the differential logic processing pri…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.