Interfacing circuitry and method for multiple discharge gaseous display and/or memory panels
US4056806A · kind A · utility
4Cited by
5References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 13, 1973 |
| Grant date | Nov 1, 1977 |
| Priority date | — |
| Expiry date | Mar 13, 1993 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0228
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An interface circuit and method for multiple discharge gaseous display and/or memory panels utilizing the slope characteristics of individual discharge units in a multiple discharge panel to control the status of individual units without effecting the status of other individual discharge units. A low level voltage signal from an addressing logic system is translated into a high voltage unidirectional pulse which is added to a periodic alternating voltage at selected times to modify the slope of discharge potential of a charge storage discharge unit to control on and off states of selected discharge units.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.