Semiconductor memory structures
US4057788A · kind A · utility
39Cited by
3References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 6, 1975 |
| Grant date | Nov 8, 1977 |
| Priority date | — |
| Expiry date | Oct 6, 1995 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0466
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of storing electric charges in a metal-nitride-oxide-semiconductor memory element by setting the threshold voltage of the element at any of a substantial number of voltages by applying both a DC voltage corresponding to the analog voltage to be stored and an AC voltage which is gradually reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.