Semiconductor memory device
US4062037A · kind A · utility
7Cited by
1References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 15, 1976 |
| Grant date | Dec 6, 1977 |
| Priority date | — |
| Expiry date | Apr 15, 1996 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/00
Abstract
A semiconductor memory device, which comprises: a P-type semiconductor material comprising on the surface thereof, an N-type doped layer, one surface region of the substrate adjoining the doped layer being used as a gate region, and further comprising in the interior thereof an N-type buried layer below another surface region of said substrate adjoining said one surface region. Electric charges representing information are stored in the buried layer. The reading time and the refreshing period are improved by shortening said reading time and lengthening said refreshing time utilization of said N-type buried layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.