Utilizing multiple polycrystalline silicon masks for diffusion and passivation
US4062707A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 2, 1976 |
| Grant date | Dec 13, 1977 |
| Priority date | — |
| Expiry date | Feb 2, 1996 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/945
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a semiconductor device includes the steps of forming a first polycrystalline silicon layer containing oxygen atoms on a semiconductor layer, of forming a second polycrystalline silicon layer containing nitrogen atoms on the first polycrystalline silicon layer, of removing a predetermined part of the first and second polycrystalline silicon layers to form an opening therein, and of diffusing impurity material into the semiconductor layer through the opening in order to form a diffused region. The fabricating process can be remarkably simplified.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.