Circuit for increasing the output current in MOS transistors
US4063117A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 7, 1977 |
| Grant date | Dec 13, 1977 |
| Priority date | — |
| Expiry date | Jan 7, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In order to increase the output current of an MOS transistor, its gate is provided with a switched capacitor drive. A tri-state inverter is used to drive the output transistor gate from an input source. A pair of delay elements are cascaded to drive one input of a NOR gate, the other input of which is fed an undelayed signal. The NOR gate is used to switch a capacitor that is also coupled to the output transistor gate. The juncture between the delays is coupled to the control electrode of the tri-state inverter. During the first delay interval, the capacitor and the output transistor gate electrode are charged. Then after the second delay interval, which is shorter than the first, the capacitor is discharged into the output transistor gate electrode which is thereby driven substantially in excess of the conventional drive level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.