Circuit combining bipolar transistor and JFET's to produce a constant voltage characteristic
US4066917A · kind A · utility
17Cited by
8References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 3, 1976 |
| Grant date | Jan 3, 1978 |
| Priority date | — |
| Expiry date | May 3, 1996 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/20
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A pair of FET's are coupled in series between the emitter and collector of a bipolar transistor and the juncture of the FET's coupled to the bipolar transistor base. The FET gates are coupled to the bipolar transistor collector. When a current is passed through the emitter-collector terminals in excess of a threshold value, a constant voltage will appear over a substantial current range. The constant voltage is related to FET Vp and can be used to compensate or track integrated circuits that contain both FET's and bipolar transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.